Wednesday, January 19, 2022

What impact will the memory system have on embedded system design signals?

Agilent Technologies has announced two interposer solutions that can be combined with logic analyzers to test DDR4 and DDR3 DRAM designs. Both of these interposer solutions can quickly and accurately capture address, command, and data signals for design debugging and verification measurements.

Agilent Technologies has announced two interposer solutions that can be combined with logic analyzers to test DDR4 and DDR3 DRAM designs. Both of these interposer solutions can quickly and accurately capture address, command, and data signals for design debugging and verification measurements.

The Agilent W4633A BGA interposer combined with the Agilent E5849A probe can detect higher data rate DDR4 x4 or x8 DRAM designs. The Agilent W3636A BGA interposer allows engineers to detect non-stacked DDR3 x16 DRAMs above 2G capacity.

The current DDR4 data rate has been increased to 3.2Gb/s, and engineers often face major challenges when designing a new generation of memory systems, such as those used in servers and embedded devices. Accurate detection and signal capture are the keys to ensuring the debugging and verification of new designs. The interposer solution can directly access DDR4 x4 or x8 DRAM BGA solder balls, which not only ensures low load, but also minimizes the impact on the signal integrity of the embedded system design. BGA probes can work on existing design systems, avoiding pre-planning or redesigning. In addition, the two can be used with the industry’s fastest logic analyzer Agilent U4154A logic analyzer system, which provides state speeds up to 4Gb/s and trigger sequence speeds up to 2.5GHz.

Jay Alexander, vice president and general manager of the Oscilloscope and Protocol Division of Agilent Technologies and Chief Technology Officer of Keysight Technologies, said: “Our customers need to use more accurate probing tools to ensure that their next-generation memory systems increase data rates and reduce power consumption. Engineers combined with DDR4 BGA interposer, E5849A probe and U4154A logic analyzer system, will be able to test DDR4 memory solutions with data rates exceeding 2400 Mb/s.”

The W3630A series of DDR3 BGA probes, oscilloscopes, logic analyzers, and U4154A logic analysis system can perform physical layer and functional tests with data rates up to 2400 Mb/s.

Features of the Agilent DDR3/4 test solution include:

●B4622B DDR2/3/4 and LPDDR/2/3 protocol conformance and analysis suite, which integrates four software tools in one, functions covering functional protocol conformance detection, automatic physical address trigger setting, and can use bus statistics and Address space access histogram statistics for overall system performance overview test. They help memory designers shorten fault diagnosis time and improve DDR design verification efficiency.

What impact will the memory system have on embedded system design signals?

●B4621B DDR2/3/4 protocol decoder software, which can transform the captured signal into easy-to-understand bus transactions to Display related data bursts. The software can decode valid read and write commands to include row and column addresses and complete data bursts related to the command. The B4621B bus decoding software can use the default DDR2, DDR3 or DDR4 detection configuration or the key system attributes of the DDR setting auxiliary tool to speed up the decoding speed of DDR2, DDR3 or DDR4 bus signals.

●DDR eye pattern scanning/eye pattern positioning, providing a unique eye pattern scanning function, used to automatically determine the time and voltage sampling points of the eye pattern on each individual channel to obtain the best sampling reliability. The DDR eye diagram scanning display function can help you analyze the integrity of the bus signal in depth, and make a qualitative comparison of all the signals scanned under the same conditions.

● DDR setting auxiliary tool, through a short series of questions and drop-down menu options, to help users make various settings in the state mode measurement during the DDR2/3/4/or LPDDR2/3/4 measurement process.

● DDR configuration program creation tool, a new member of the Agilent DDR setting assistance and eye diagram positioning software package, allows engineers to define package information based on the custom detection solution used by DDR/LPDDR settings, and generate XML configuration files based on the package information.

The U4154A logic analysis module is a full-featured module with a state speed of up to 4Gb/s and a trigger sequence speed of 2.5GHz, allowing engineers to trigger and capture DDR4 3.2Gb/s signals with confidence. By working with DDR4 probing solutions, B4621B decoder and B4622B conformance test software suite, U4154A can provide comprehensive test functions for memory system integration.

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