Design of Data Storage and Communication System Based on MSP430F449 Single Chip Computer

“In data acquisition and measurement instruments, especially portable devices, data storage and transmission are inevitable problems. In recent years, TI's low-power microcontroller MSP430 has caused great changes in the field of instrument design and manufacturing. New controllers and The application of large-capacity serial memory greatly improves the performance of the product. This article mainly solves two problems.

“

In data acquisition and measurement instruments, especially portable devices, data storage and transmission are inevitable problems. In recent years, TI's low-power microcontroller MSP430 has caused great changes in the field of instrument design and manufacturing. New controllers and The application of large-capacity serial memory greatly improves the performance of the product. This article mainly solves two problems.

1. Solve the problem of data interface between the data collected by MSP430 and EEPROM24C256, that is, the problem of data storage;

2. Solve the problem of data communication between EEPROM and host computer (ordinary microcomputer), that is, the problem of data upload after storage.

First, give a brief introduction to the main integrated circuits

Introduction to MSP430F449

MSP430F449 is one of the MSP430 series. The MSP430 series is a 16-bit microcontroller with high integration, rich functions, and low power consumption. Its integrated debugging environment Embedded Workbench provides a good C language development platform. In the design, based on the complexity of the program and the requirement of large program capacity, MSP430F449 was selected. This chip has 64K program memory, which can meet most complex control needs; its package 100-PIN QFP has good interchangeability, and MSP430F437 , MSP430F435 and other chips have exactly the same pins, which can be reasonably selected in terms of program volume.

Introduction to 24C256

24C256 is a serial EEPROM that supports I2C protocol, with a capacity of 32768 bytes.

The above is the pin diagram of 24C256, where A0, A1, A2 constitute the physical address of the memory, as the control address for distinguishing different memories on the I2C bus, and 8 devices can be connected on the I2C bus at the same time. WP is write protection, high level will prohibit write operations to the device; SCL and SDA are the control lines for data transmission, among which SCL is the clock, SDA is the bidirectional data line, used to complete the writing and reading of data, The transmission is completed jointly by the clock end SCL in accordance with the requirements of the I2C protocol.

Introduction to CP2102

CP2102 is a bridge circuit from USB to UART, which completes the conversion of USB data and UART data. The circuit connection is simple and the data transmission is reliable. It converts the serial data of the lower computer into the USB data format to facilitate data communication. Run the chip on the upper computer. The driver program can read and write USB data according to a simple serial port. The programming is simple and the operation is flexible.

Figure 1 MSP430F449 interface schematic diagram

The above is the schematic diagram of the interface between MSP430F449 and EEPROM and CP2102. This article focuses on the introduction of data storage and data transmission after the completion of the data acquisition process.

There are many kinds of data collection. The analog quantity can be collected through the on-chip ADC converter, or the data can be converted to special sensors such as temperature sensors and pressure sensors through independent port control lines. This is not as described in this article. content. This article is mainly for the storage and transmission of data after different collection processes are completed.

Objective requirements for automatic data storage

In many measurement processes, it is not only required to read simple meter values, but also to scientifically analyze and process data over a period of time to obtain the purpose of prediction and analysis. In this case, it may require a long measurement time, the acquisition requires automatic, no manual watch, so the data must be automatically stored; another reason is that the frequency of data acquisition is relatively high, and human observation cannot meet the actual needs. The collected data is effectively stored.

Reasonable choice of integrated circuit

There are many large-capacity FLASH chips that have been widely used, but this type of chip has many ports and requires more controller resources. When there are many control peripherals and complex interfaces, especially portable instruments with full functions and volume Small, in order to simplify the peripheral circuit, the serial EEPROM with I2C interface has become the best choice without affecting the storage capacity.

24C256 program control principle

24C256 is a 512×64 memory with I2C interface. In addition to the logic necessary to follow the I2C protocol during data storage, one of the most easily overlooked and error-prone problems is the storage address problem.

The data capacity of 24C256 is 32768, which is the effective number of bytes that can be stored. So its address is a 16-bit integer, the valid range is 0～32768, and the data byte is stored in units. In the 16-bit address, there are only 15 valid data bits, and the lower 6 (0～5) bit address represents the capacity is 0 ～63, and then the continuous 9 (6～14) bit address indicates that the range of the page number is 0～511. In the continuous data storage process, the storage address automatically completes the accumulation process in the same page; when the data is stored in different pages, The address cannot be accumulated automatically. If it is not processed correctly, the data will start over from the address starting on this page to overwrite the existing data. For example, address 63 (binary code 111111) represents the last storage space of page 0, and address 64 (binary code 1, 000000) represents the first storage space of page 1. If the device is in continuous storage mode when the current storage address is 63, the data will be wrong.

what is the reason? 24C256 supports continuous storage of data. The maximum storage amount is 64, which is the content of a page. If the address selection exceeds this limit, the data will be stored over the beginning of the page, which will cause data errors. In use, although the data is stored in pages, it is continuous data in form, so there is no need to distinguish between page addresses and intra-page addresses in storage.

In continuous storage, although the number of data stored each time is less than 64, the data may also be wrong. For example, each time the number of storage is 11, the address change is 0, 11, 22, 33, 44, 55, 66…, it seems There is no problem. The address is incremented by 11 each time, but the stored result is still wrong. What is the reason? The space starting at address 55 cannot provide storage space for 11 consecutive pages. When the address increases to 63, the data restarts from the page 0 address, which causes data storage errors. The effective solution is if the continuous storage mode is used, the address arrangement should be such that the size of the storage block is 64, 32, 16, 8, 4, 2. In addition, continuous address storage cannot be used. If the effective data bits in the data collection are less than 64, for example, the result of each collection is 30 bytes, in the continuous storage mode, it should be stored in units of 32, and the insufficient bytes will be filled with zeros.

The following is the basic control module for 24C256 data transmission

Delay processing module

void IIC_Delay(void)

{

_NOP();

_NOP();

_NOP();

}

Ø Start the I2C module

void start_IIC(void) // start I2

{

P2OUT&=0xf9; //Set P2 output

P2DIR&=0XFD; //SDA=1, the pull-up resistor makes P2.1 H, FD=1111, 1101

P2DIR&=0XFB; //SCL=1 FB=1111, 1011

P2DIR|=0X02; // SDA=0

P2DIR|=0X04; // SCL=0

}[Page]

Ø Stop the I2C module

void stop_IIC(void) //

{

P2DIR|=0X02;//SDA=0

IIC_Delay();

P2DIR&=0XFB;//SCL=1 FB=1111, 1011

P2DIR&=0XFD;//SDA=1, the pull-up resistor makes P2.1 H, FD=1111, 1101

IIC_Delay();

P2DIR|=0X04;// SCL=0

}

Ø Send “0” module

void send_zero(void) //

{

P2DIR|=0X02;// SDA=0

IIC_Delay();

P2DIR&=0XFB;//SCL=1 FB=1111, 1011

IIC_Delay();

P2DIR|=0X04;// SCL=0

}

Ø Send 1 module

void send_one(void) //

{

P2DIR&=0XFD;//SDA=1, the pull-up resistor makes P2.1 H, FD=1111, 1101

IIC_Delay();

P2DIR&=0XFB;//SCL=1 FB=1111, 1011

IIC_Delay();

P2DIR|=0X04;// SCL=0

}

Ø Send single character data

void send _char (unsigned char data_out) //

{

unsigned char i, tmp=0x80;

for(i=0;i《8;i++)

{

if ((data_out & tmp) “0)

send_one();

else

send_zero();

tmp/=2;

}

}

Ø Read single character data

unsigned char read_char(void)

{

unsigned char i, tmp=0x80;

unsigned char data1=0;

for (i=0;i《8;i++)

{

P2DIR&=0XFD;//SDA=1, 11111101

IIC_Delay();//

P2DIR&=0XFB;//SCL=1 FB=1111, 1011

IIC_Delay();

if ((P2IN&0x02)》0x00)

{

data1|=tmp;

}

P2DIR|=0X04;// SCL=0

IIC_Delay();

tmp/=2;

}

return data1;

}

Ø Check the response signal module

void iic_ACK (void)

{

ack_flag=0x00;

P2DIR&=0XFD;//SDA=1, FD=1111, 1101

IIC_Delay();

P2DIR&=0XFB;//SCL=1 FB=1111, 1011

IIC_Delay();

while ((P2IN&BIT1) == BIT1);

P2DIR|=0X04;// SCL=0

IIC_Delay();

}[Page]

Ø Reject response module

void iic_NACK(void) {

P2DIR&=0XFD;//SDA=1,

IIC_Delay();

P2DIR&=0XFB;//SCL=1 FB=1111, 1011

IIC_Delay();

P2DIR|=0X04;// SCL=0

IIC_Delay();

P2DIR|=0X02;// SDA=0

IIC_Delay();//

}

Ø Write continuous data module

void WriteNbyte (unsigned char *p, unsigned int addr, unsigned char number)

{

start_IIC();

send_char(0xa2);

iic_ACK();

send_char(addr/256); //high address byte

iic_ACK();

send_char(addr%256);

iic_ACK();

do

{

send_char(*p);

p++;

iic_ACK();

}

while(–number);

stop_IIC();

delay(10);

}

Ø Send response module: ACK (LOW)

void S_ACK (void)

{

P2DIR|=0X02;// SDA=0

IIC_Delay();

P2DIR&=0XFB;//SCL=1 FB=1111, 1011

IIC_Delay();

P2DIR|=0X04;// SCL=0

IIC_Delay();

}

Ø Continuous reading character module

void ReadNbyte (unsigned char *p, unsigned int addr, unsigned char number)

{

start_IIC();

send_char(0xa2);

iic_ACK();

send_char(addr/256);

iic_ACK();

send_char(addr%256);

iic_ACK();

start_IIC();

send_char(0xa3);

iic_ACK();

do

{

*p=read_char();

p++;

if (number!=1)

S_ACK(); //send ACK

}

while(–number);

iic_NACK();

stop_IIC();

}

Data transfer

Data transmission is an effective way for the data stored in EEPROM to reach the computer. The most commonly used serial (RS232) interface for uploading data to the computer is now due to the continuous maturity of USB counting, data transmission can be easily and quickly achieved through USB, and it can meet The speed and appearance of the device are required, but the USB driver design is a more complicated task. In this example, a simple bridge circuit is used to bridge the UART interface data through the CP2102 to directly realize the USB conversion of the data and output it from the 430F449 asynchronous serial port. The data is automatically converted into data conforming to the USB protocol and directly connected to the USB port of the computer. The upper computer application program can directly read and write the port data like a serial port through the CP2102 driver.

in conclusion

The above hardware design is relatively simple and reliable, and can be copied to the same type of control chip. The software code also has better portability, as long as the control clock and data port are consistent with the program software settings.

The Links:   LM24P20   LM150X08-TL04