Authors: Analog Devices｜Neil Quinn, Product Application Engineer; Richard Anslow, System Application Engineer
Data from industry experts such as PROCENTEC shows that applications based on RS-485 fieldbus technology (PROFIBUS®) continue to grow, and industrial Ethernet (PROFINET) applications are also growing rapidly. In 2018, a total of 61 million PROFIBUS fieldbus nodes were installed worldwide, and PROFIBUS process automation (PA) equipment increased by 7% year-on-year. The PROFINET installation base is 26 million nodes, and the number of devices installed in 2018 alone reached 51 million.
With the steady growth in the adoption rate of RS-485 fieldbus, and at the same time Industry 4.0 has accelerated the development of smart interconnected factories, we need to ensure that fieldbus technology is continuously optimized to provide support for intelligent systems. The optimized fieldbus technology must carefully weigh the two factors of EMC stability and data transmission reliability.
Unreliable data transmission will reduce overall system performance. In motion control applications, fieldbus is generally used to implement closed-loop position control for single-axis or multi-axis motors. These motors are generally in the state of high data rate, long cable transmission lines, as shown in Figure 1. If the position control is unreliable, the actual performance will decrease and the defective rate will increase, which in turn leads to a decrease in factory productivity. In wireless infrastructure applications, fieldbus is generally used to implement tilt/position control of the antenna, so accurate data transmission is essential. In motion control and wireless infrastructure applications, different levels of EMC protection need to be provided, as shown in Figure 1. Motion control applications are usually in an electrically noisy environment, which may cause data errors. For wireless infrastructure, it is necessary to provide protection measures to avoid indirect lightning damage in the exposed environment.
For these demanding applications, it is necessary to carefully check the cable timing performance of the RS-485 transceiver to ensure system reliability and EMC characteristics. This article will introduce several important system timing and communication cable concepts; explain some key performance indicators, including clock and data distribution, cable drive capabilities; and demonstrate the advantages of using the next-generation ADM3065E/ADM3066ERS-485 transceiver for industrial applications.
Timing performance
In order to achieve reliable data transmission through long cables at high data rates, some important factors affecting RS-485 must be considered, such as timing performance concepts such as jitter and skew commonly associated with low-voltage differential signaling (LVDS). Both the jitter and skew caused by the RS-485 transceiver and the system cable need to be considered.
Figure 1. EMC, data rate and cable length requirements for RS-485
Jitter and skew
Jitter can be quantified as time interval error; that is, the difference between the expected arrival time and the actual arrival time of a signal transition. In the communication link, there are many factors that can cause jitter. Basically, every factor that causes jitter can be described as random or deterministic. Random jitter can be described by Gaussian distribution, which generally originates from thermal noise and broadband scattering noise inside the semiconductor. Deterministic jitter comes from within the communication system; for example, duty cycle distortion, crosstalk, periodic external noise sources, or inter-symbol interference. For communication systems that use the RS-485 standard, the data rate is lower than 100 MHz, and the deterministic jitter is more obvious.
Peak-to-peak jitter is a useful indicator of the overall performance of the system jitter generated by deterministic sources. It can be measured in the time domain, specifically by superimposing a large number of signal transitions (generally called eye diagrams) on the same Display. Use an infinite continuous oscilloscope display or use the oscilloscope’s built-in jitter decomposition software to achieve, as shown in Figure 2. 2. As shown in Figure 2. 2
Figure 2. Time interval error, jitter, and eye diagram
The width of the overlap transition is the peak-to-peak jitter, and the blank area in the middle is called the eye. This eye is the area where the receiving node can sample at the far end of the RS-485 long cable. The larger the eye width, the wider the window that the receiving node can sample, and the risk of incorrectly received bits can be reduced. The usable eye is mainly affected by the deterministic jitter from the RS-485 driver and receiver, and interconnecting cables.
Figure 3. The main factors causing jitter in the RS-485 communication network
Figure 3 shows the various sources of jitter in the communication network. In RS-485-based communication systems, the two major factors affecting timing performance are transceiver pulse skew and inter-symbol interference. Pulse skew, also known as pulse width distortion or duty cycle distortion, is a deterministic jitter generated by the transceiver at the transmitting and receiving nodes. Pulse skew is defined as the difference in propagation delay between the rising and falling edges of the signal. In differential communication, this skew will produce an asymmetric crossover point, and the duration of sending 0s and 1s does not match. In a clock distribution system, excessive pulse skew appears as a distortion of the duty cycle of the transmit clock. In a data distribution system, this asymmetry can increase the peak-to-peak jitter displayed in the eye diagram. In both cases, excessive pulse skew will adversely affect the signal transmitted through RS-485, and will reduce the available sampling window and overall system performance.
Inter-symbol interference (ISI) occurs when the arrival time of a signal edge is affected by the data pattern that processes the signal edge. For applications that use long cables for interconnection, the inter-symbol interference effect becomes more and more obvious, making it a key factor affecting RS-485 networks. Longer interconnections result in an RC time constant, where the cable capacitance is not fully charged at the end of a single bit period. In applications where the transmitted data only consists of a clock, there is no such inter-symbol interference. Inter-symbol interference may also be caused by impedance mismatch on the cable transmission line (due to improper use of stubs or terminating resistors). RS-485 transceivers with high output drive capability can generally help minimize inter-symbol interference effects because they require less time to charge the RS-485 cable load capacitance.
The percentage of peak-to-peak jitter tolerance is highly related to the application. Generally, 10% jitter is used as a benchmark to measure the performance of RS-485 transceivers and cables. Excessive jitter and skew will affect the sampling performance of the RS-485 transceiver at the receiving end and increase the risk of communication errors. In a correctly terminated transmission network, select an optimized transceiver to minimize the effects of transceiver pulse skew and inter-symbol interference, so as to achieve a more reliable and error-free communication link.
RS-485 transceiver design and cable influence
The TIA-485-A/EIA-485-A RS-485 standard 3 provides specifications for the design and operating range of RS-485 transmitters and receivers, including voltage output differential (VOD), short-circuit characteristics, common-mode load, and input Power threshold and range. The TIA-485-A/EIA-485-A standard does not specify the timing performance (including skew and jitter) of RS-485, which is optimized by the IC supplier according to the specifications of the product data sheet.
Other standards, such as TIA-568-B.2/EIA-568-B.2 Twisted Pair Telecommunications Standard 4, provide a background for the influence of cable AC and DC on the quality of RS-485 signals. This standard provides relevant considerations and test procedures for jitter, skew, and other timing measurements, and sets performance limits; for example, the maximum skew allowed for a 5e cable is 45 ns/100 m. ADI application note AN-1399 discusses in detail the TIA-568-B.2/EIA-568-B.2 standard and the impact of using non-ideal cables on system performance.
Although the available standards and product data sheets provide a lot of useful information, any meaningful system timing performance characterization requires measuring the performance of the RS-485 transceiver over a long cable.
Figure 4. Typical clock jitter performance of ADM3065E
Use RS-485 to achieve faster and wider communication
The ADM3065E RS-485 transceiver has ultra-low transmitter and receiver skew performance, so it is very suitable for transmitting precision clocks, usually motor coding standards, such as EnDat 2.2. 5 It turns out that ADM3065E is typical in motor control applications The deterministic jitter of cable length is less than 5% (Figure 4 and Figure 5). The ADM3065E has a wide supply voltage range, so this level of timing performance can also be used in applications that require 3.3 V or 5 V transceiver power.
Figure 5. ADM3065E receiving eye diagram: 25 MHz clock distributed on a 100 m cable
In addition to excellent clock distribution, the timing performance of the ADM3065E also supports the realization of reliable data distribution, as well as high-speed output and minimal additional jitter. Figure 6 shows that by using ADM3065E, the timing constraints of RS-485 data communication will be greatly relaxed. The jitter of standard RS-485 transceivers is usually 10% or lower. The ADM3065E can run at speeds above 20 Mbps on cables up to 100 meters long and still maintain 10% jitter at the receiving node. This low-level jitter reduces the risk of erroneous sampling of the receiving data node, and can achieve transmission reliability that cannot be achieved with a typical RS-485 transceiver. For applications where the receiving node can tolerate up to 20% jitter, a data rate of up to 35 Mbps can be achieved within a 100-meter cable.
Figure 6. ADM3065E receiving data node has excellent jitter performance
This timing performance makes the ADM3065E an ideal choice for motor control encoder communication interfaces. For each data packet transmitted using the EnDat 2.2 encoder protocol, the data transmission is synchronized with the falling edge of the clock. Figure 7 shows that after the initial calculation of the absolute position (TCAL), the start bit begins to transmit data from the encoder back to the main controller. The following error bits (F1, F2) indicate the specific location of the fault error caused by the encoder. . Then, the encoder sends an absolute position value, starting with LS, followed by data. The integrity of clock and data signals is critical to the successful transmission of positioning and error signals over long cables. EnDat 2.2 specifies a maximum jitter of 10%. This is the maximum jitter requirement specified by EnDat 2.2 when using a 20-meter cable and a clock rate of 16 MHz. Figure 4 shows that ADM3065E can meet this requirement with a clock jitter of only 5%. Figure 6 shows that ADM3065E can meet the data transmission jitter requirement, but the standard RS-485 transceiver cannot.
ADI characterizes the excellent cable timing performance of the ADM3065E transceiver to ensure that system designers have the necessary information to successfully develop a design that meets the EnDat 2.2 specifications.
Figure 7. EnDat 2.2 physical layer and protocol for clock/data synchronization (adjusted based on EnDat 2.2 chart)
Longer cable communication for higher reliability
The TIA-485-A/EIA-485-A RS-485 standard 3 requires the use of a compliant RS-485 driver to generate a differential voltage amplitude VOD of at least 1.5 V in a fully loaded network. This 1.5 VOD allows 1.3 V DC voltage attenuation in long cables, and RS-485 receivers require at least 200 mV input differential voltage to work. ADM3065E is used to output at least 2.1 V VOD when 5 V power supply is provided. This situation has exceeded the RS-485 specification requirement.
A full-load RS-485 network is equivalent to a 54 Ω differential load. The load simulates a dual-terminated bus and contains two 120 Ω resistors. The other 750 Ω is composed of 32 1-unit loads (or 12 kΩ) connected devices. The ADM3065E uses a proprietary output architecture to maximize VOD while meeting the common-mode voltage range requirements, and exceeds the requirements of TIA-485-A/EIA-485-A. Figure 8 shows that when the ADM3065E is powered by a 3.3 V power rail, the driving force generated exceeds the RS-485 standard requirement by >210%, while using a 5 V power rail for power supply exceeds >300%. This expands the communication range of the ADM3065E series and supports more remote nodes and higher noise tolerance than conventional RS-485 transceivers.
Figure 8. The performance of the ADM3065E in a wide range of power supplies exceeds the RS-485 driver requirements
Figure 9 further illustrates this point through the typical application performance of a 1000-meter cable. When communicating via standard AWG 24 cables, the performance of the ADM3065E is 30% higher than that of a standard RS-485 transceiver—the noise tolerance on the receiving node is 30% higher, or at low data rates, the maximum cable length is increased by 30%. This performance is very suitable for wireless infrastructure applications with RS-485 cables up to several hundred meters.
Figure 9. ADM3065E can provide excellent differential signals for ultra-long-distance applications
EMC protection and immunity
RS-485 signal adopts balanced differential transmission, which has certain anti-interference ability. System noise is equally coupled to each wire in the RS-485 twisted pair cable. The twisted-pair wire causes the generated noise current to flow in the opposite direction, and the electromagnetic field coupled with the RS-485 bus cancels each other out. This reduces the electromagnetic susceptibility of the system. In addition, the enhanced 2.1 V drive strength of the ADM3065E supports a higher signal-to-noise ratio (SNR) in communications. In long cable transmission, for example, the distance between the ground and the wireless base station antenna is as long as several hundred meters. The enhanced SNR performance and excellent signal integrity can ensure accurate and reliable tilt/position control of the antenna.
Figure 10. The cable length of the wireless infrastructure may exceed a few hundred meters
As shown in Figure 1, the RS-485 transceiver needs EMC protection, and it is directly connected to the outside world through adjacent connectors and cables. For example, ESD on exposed RS-485 connectors and cables from encoders to motor drives is a common system hazard. The system-level IEC 61800-3 standard related to the EMC immunity requirements of variable-speed electric drive systems requires a minimum of ±4 kV (contact) / ±8 kV (air) IEC 61000-4-2 ESD protection. The ADM3065E exceeds this requirement and provides IEC 61000-4-2 ESD protection of ±12 kV (contact)/±12 kV (air).
Figure 11. A complete 25 Mbps signal and power isolation RS-485 solution with ESD, EFT and surge protection functions
For wireless infrastructure applications, enhanced EMC protection is required to prevent damage from lightning strikes. Adding 1 SM712 TVS and 2 10 Ω coordination resistors to the ADM3065E input can enhance EMC protection, providing up to ±30 kV 61000-4-2 ESD protection and ±1 kV IEC 61000-4-5 surge protection.
In order to improve the immunity of electrical machine control, process automation and wireless infrastructure applications with demanding electrical requirements, electrical isolation devices can be added. Utilizing ADI’s iCoupler® and isoPower® technology, it is possible to add galvanic isolation with both reinforced insulation and 5 kV rms transient voltage to the ADM3065E. The ADuM231D provides three 5 kV rms signal isolation channels with precise timing performance and can operate reliably at speeds up to 25 Mbps. The ADuM6028 isolated DC-DC converter can provide the required isolated power with a withstand rating of 5 kV rms. Using two ferrite beads can easily meet the requirements of EMC related standards, such as EN 55022 Class B/CISPR 22, so as to achieve a 6 mm × 7.5 mm compact isolated DC-DC solution.
in conclusion
The performance of ADI’s ADM3065E RS-485 transceiver is better than industry standards. Compared with standard RS-485 devices, it can achieve faster and longer-distance communications. Under the 10% jitter level specified by EnDat 2.25, the ADM3065E allows users to work at a clock rate of 16 Mhz with a cable of up to 20 meters, which is difficult to meet with standard RS-485 devices. The driving force of the ADM3065E exceeds the RS-485 bus driving requirements by 300%, and provides better reliability and higher noise tolerance when using longer cables. Immunity can be improved by increasing iCoupler isolation, including the ADuM231D signal isolator, and the industry’s smallest isolation power solution ADuM6028.
references
1 “In 2018, the number of PROFINET and PROFIBUS nodes exceeded 87 million.” Profibus Group, May 2019.
2Conal Watterson. “LVDS and M-LVDS Circuit Implementation Guide.” Analog Devices, March 2013.
3 “TIA/EIA-485-A standard, used to balance the electrical characteristics of generators and receivers in digital multipoint systems.” IHS Markit Inc., March 1998.
4 “TIA/EIA-568-B.2, Commercial Building Telecommunications Wiring Standard-Part 2: Balanced Twisted Pair components.” Telecommunications Industry Association, May 2001.
5 “EnDat 2.2-Bidirectional interface for position encoders.” Heidenhain, September 2017.
About the Author
Neil Quinn is a product application engineer at ADI and a member of the Interface and Isolation Technology Department in Limerick, Ireland. Neil received a bachelor’s degree in electrical engineering from Maynooth University, USA in 2013. He mainly researches industrial and high-speed communication interfaces, such as RS-485 and LVDS, and ADI’s iCoupler digital isolation products. Contact information:[email protected]
